With the continuous development of semiconductor technology, lateral double diffused metal oxide semiconductor field effect transistor (LDMOS) devices have been widely used in mobile phones, specifically in cell phones, due to its excellent short channel characteristics. As mobile communication market (especially the cellular communication market) continues to increase, the manufacturing process of LDMOS devices become more increasingly mature. As a power switching device, LDMOS has such characteristics as a relatively high operating voltage, simple process, easy to be compatible in the process with low-voltage CMOS circuit. During operation, LDMOS includes an “off-state” and an “on-state”. Compared with common MOS device, LDMOS has a lightly doped implanting region at the source and the drain, which is known as a drift region. Since it is generally used in power circuits requiring a large output power, and LDMOS must be able to withstand high voltages. With the wild applications of LDMOS in the power integrated circuits, the performance requirements for LDMOS device are also increasing, which requires a higher off-state breakdown voltage (off-BV) with a smaller on-resistance (Rdson). In conclusion, there are more urgent demand for LDMOS devices with a higher off-BV and a smaller Rdson.
FIG. 1 illustrates a sectional view of an LDMOS device manufactured according to a conventional method. Referring to FIG. 1, the LDMOS includes a substrate 100, an active region formed in the substrate, a well 101 formed in the substrate, a field oxide layer 102 positioned on the surface junction of substrate 100 and the well 102, a drift region 108 positioned in the semiconductor substrate 100, a drift region field oxide layer 103 covering the drift region 108, a body leading-out region 104 positioned in the well region 101, a source region 105 positioned in the well region 101, a drain region 106 positioned in the drift region 108, a gate structure 107 positioned on the substrate 100. The source, drain, and gate can be led out from the source region, a drain region and the gate respectively by patterning. The gate structure 107 can partially extend to the drift region field oxide layer 103 of the drift region 108. FIG. 2 is a top view of an LDMOS device manufactured according to a conventional method. The LDMOS device includes a source 200, a gate 201, a drain 202, and a drift region. The entire drift region is a field oxide layer 203, which is adjacent to the drain 202. Part of the gate 201 is positioned on the field oxide layer 203 of the drift region. In the prior art, in order to obtain a less Rdson, the concentration of the drift region must be high, however, the higher concentration may result in lower off-state breakdown voltage.
Therefore, there is a need to provide a lateral double diffused metal oxide semiconductor field-effect transistor which can decrease the Rdson while obtaining a higher off-state breakdown voltage value.